#include"SIEU.h"

int64_t sign_extend_24_to_64(int32_t imm24) {
    int32_t masked = imm24 & 0xFFFFFF;
    // 左移40位，然后算术右移40位，自动进行符号扩展
    return (static_cast<int64_t>(masked) << 40) >> 40;
}
void SIEU::input_operands(std::vector<base_operand*>* operands){
    this->operand_list = operands;
}
inline uint64_t SIEU::read_Reg(int id) {
    return this->RF->get_register_value(id);
}


inline void SIEU::write_Reg(int reg_id, uint64_t value, int delay) {
    // return set_vec_regsiter_single(reg_id, this->id, value);
    this->res_value = value;
    this->dst_reg_id = reg_id;
    this->delay_cycles = delay;
}

write_req_info_reg  SIEU::upload_write_msg() {
    write_req_info_reg res;
    res.value = this->res_value;
    res.reg_id = this->dst_reg_id;
    res.delay = this->delay_cycles;
    return res;
}

inline bool is_Vec_Addr_Reg(int reg_id) {
    //AR0~AR7, OR0~OR7代表是VARF，否则为SARF
    if ((reg_id >= AR0 && reg_id <= AR7) || (reg_id >= OR0 && reg_id <= OR7)) {
        return true;
    } else {
        return false;
    }
}

//对src1为imm的情况进行处理，对6位的立即数进行符号扩展
inline int32_t imm_6_signed_inflation(uint64_t imm) {
    if (imm & 0x20) { //检查第6位（符号位）
        return static_cast<int32_t>(imm | 0xFFFFFFC0); //符号扩展为32位
    } else {
        return static_cast<int32_t>(imm & 0x3F); //保持原值
    }
}

inline int64_t imm_6_signed_inflation_64(uint64_t imm) {
    if (imm & 0x20) { //检查第6位（符号位）
        return static_cast<int64_t>(imm | 0xFFFFFFFFFFFFFFC0); //符号扩展为64位
    } else {
        return static_cast<int64_t>(imm & 0x3F); //保持原值
    }
}

inline uint64_t SIEU::do_SADD_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    //这里我们考虑控制寄存器的操作
    uint64_t src1 = read_Reg(src1_reg_id);
    uint64_t src2 = read_Reg(src2_reg_id);
    int64_t bits_src1 = static_cast<int64_t>(src1);
    int64_t bits_src2 = static_cast<int64_t>(src2);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 > 0 && bits_src2 > 0 && bits_src1 + bits_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //上溢出
            //[61:60], [C1, MSB1] = 01
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD overflow exception");
            }
            
            res = 0x7FFFFFFFFFFFFFFF;
        }else if (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0){
            //下溢出
            //[61:60], [C1, MSB1] = 10
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD underflow exception");
            }
            res = 0x8000000000000000;
        }else{
            
            // uint64_t mask1 = ~ 1ULL;
            // vst &= mask1;
            
            res = static_cast<uint64_t>(bits_src1 + bits_src2);
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADD_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    int64_t bits_src1 = imm_6_signed_inflation_64(imm);
    uint64_t src2 = read_Reg(src2_reg_id);
    int64_t bits_src2 = static_cast<int64_t>(src2);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 > 0 && bits_src2 > 0 && bits_src1 + bits_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //上溢出
            //[61:60], [C1, MSB1] = 01
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD overflow exception");
            }
            
            res = 0x7FFFFFFFFFFFFFFF;
        }else if (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0){
            //下溢出
            //[61:60], [C1, MSB1] = 10
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD underflow exception");
            }
            res = 0x8000000000000000;
        }else{
            
            // uint64_t mask1 = ~ 1ULL;
            // vst &= mask1;
            
            res = static_cast<uint64_t>(bits_src1 + bits_src2);
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADDU_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = read_Reg(src1_reg_id);
    uint64_t bits_src2 = read_Reg(src2_reg_id);
    

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 + bits_src2 < bits_src1 || bits_src1 + bits_src2 < bits_src2)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU overflow exception");
                res = bits_src1 + bits_src2;
            } else {
                res = 0xFFFFFFFFFFFFFFFF;
            }
        }else{
            res = bits_src1 + bits_src2;
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);

    write_Reg(dst_reg_id, res, 1);
    return res;
} 

inline uint64_t SIEU::do_SADDU_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = imm;
    uint64_t bits_src2 = read_Reg(src2_reg_id);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 + bits_src2 < bits_src1 || bits_src1 + bits_src2 < bits_src2)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU overflow exception");
                res = bits_src1 + bits_src2;
            } else {
                res = 0xFFFFFFFFFFFFFFFF;
            }
        }else{
            res = bits_src1 + bits_src2;
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADD32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t src1 = read_Reg(src1_reg_id);
    uint64_t src2 = read_Reg(src2_reg_id); 

    int32_t low_src1 = static_cast<int32_t>((src1 ) & 0xFFFFFFFF);
    int32_t high_src1 = static_cast<int32_t>((src1 >> 32) & 0xFFFFFFFF);
    int32_t low_src2 = static_cast<int32_t>((src2 ) & 0xFFFFFFFF);
    int32_t high_src2 = static_cast<int32_t>((src2 >> 32) & 0xFFFFFFFF);

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((low_src1 > 0 && low_src2 > 0 && low_src1 + low_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 low overflow exception");
                res_low = static_cast<uint64_t>(low_src1 + low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else if (low_src1 < 0 && low_src2 < 0 && low_src1 + low_src2 > 0){
            sst |= MASK_SIGN_UNDER_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 low underflow exception");
                res_low = static_cast<uint64_t>(low_src1 + low_src2);
            } else {
                res_low = 0x80000000;
            }
        }else{
            res_low = static_cast<uint64_t>(low_src1 + low_src2);
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }

    try {
        if ((high_src1 > 0 && high_src2 > 0 && high_src1 + high_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 high overflow exception");
                res_high = static_cast<uint64_t>(high_src1 + high_src2);
            } else {
                res_high = 0x7FFFFFFF;
            }
        }else if (high_src1 < 0 && high_src2 < 0 && high_src1 + high_src2 > 0){
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 high underflow exception");
                res_high = static_cast<uint64_t>(high_src1 + high_src2);
            } else {            
                res_high = 0x80000000;
            }
        }else{
            res_high = static_cast<uint64_t>(high_src1 + high_src2);
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    res = (res_high << 32) | (res_low);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADD32_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t src2 = read_Reg(src2_reg_id);

    int32_t src1 = imm_6_signed_inflation(imm);
    int32_t low_src2 = static_cast<int32_t>((src2 ) & 0xFFFFFFFF);
    int32_t high_src2 = static_cast<int32_t>((src2 >> 32) & 0xFFFFFFFF);

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((src1 > 0 && low_src2 > 0 && src1 + low_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 low overflow exception");
                res_low = static_cast<uint64_t>(src1 + low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else if (src1 < 0 && low_src2 < 0 && src1 + low_src2 > 0){
            sst |= MASK_SIGN_UNDER_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 low underflow exception");
                res_low = static_cast<uint64_t>(src1 + low_src2);
            } else {
                res_low = 0x80000000;
            }
        }else{
            res_low = static_cast<uint64_t>(src1 + low_src2);
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }

    try {
        if ((src1 > 0 && high_src2 > 0 && src1 + high_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 high overflow exception");
                res_high = static_cast<uint64_t>(src1 + high_src2);
            } else {
                res_high = 0x7FFFFFFF;
            }
        }else if (src1 < 0 && high_src2 < 0 && src1 + high_src2 > 0){
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADD32 high underflow exception");
                res_high = static_cast<uint64_t>(src1 + high_src2);
            } else {            
                res_high = 0x80000000;
            }
        }else{
            res_high = static_cast<uint64_t>(src1 + high_src2);
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADD32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    res = (res_high << 32) | (res_low);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADDU32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t u_src1 = read_Reg(src1_reg_id);
    uint64_t u_src2 = read_Reg(src2_reg_id);

    uint64_t low_src1 = (u_src1 ) & 0xFFFFFFFF;
    uint64_t high_src1 = (u_src1 >> 32) & 0xFFFFFFFF;
    uint64_t low_src2 = (u_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (u_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (low_src1 + low_src2 < low_src1 || low_src1 + low_src2 < low_src2){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_UNSIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU32 low overflow exception");
                res_low = static_cast<uint64_t>(low_src1 + low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else{
            res_low = low_src1 + low_src2;
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    try {
        if (high_src1 + high_src2 < high_src1 || high_src1 + high_src2 < high_src2){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU32 high overflow exception");
                res_high = static_cast<uint64_t>(high_src1 + high_src2);
            } else {    
                res_high = 0xFFFFFFFF;
            }
        }else{
            res_high = high_src1 + high_src2;
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    res = (res_high << 32) | (res_low);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SADDU32_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t src2 = read_Reg(src2_reg_id);

    uint32_t src1 = imm & 0xFFFFFFFF;
    uint32_t low_src2 = static_cast<int32_t>((src2 ) & 0xFFFFFFFF);
    uint32_t high_src2 = static_cast<int32_t>((src2 >> 32) & 0xFFFFFFFF);

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_ADD;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (src1 + low_src2 < src1 || src1 + low_src2 < low_src2){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_UNSIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU32 low overflow exception");
                res_low = static_cast<uint64_t>(src1 + low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else{
            res_low = src1 + low_src2;
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    try {
        if (src1 + high_src2 < src1 || src1 + high_src2 < high_src2){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SADDU32 high overflow exception");
                res_high = static_cast<uint64_t>(src1 + high_src2);
            } else {    
                res_high = 0xFFFFFFFF;
            }
        }else{
            res_high = src1 + high_src2;
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SADDU32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    res = (res_high << 32) | (res_low);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUB_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t src1 = read_Reg(src1_reg_id);
    uint64_t src2 = read_Reg(src2_reg_id);
    int64_t bits_src1 = static_cast<int64_t>(src1);
    int64_t bits_src2 = static_cast<int64_t>(src2);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 > 0 && bits_src2 < 0 && bits_src1 - bits_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //上溢出
            //[61:60], [C1, MSB1] = 01
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB overflow exception");
                res = static_cast<uint64_t>(bits_src1 - bits_src2);
            } else {
                res = 0x7FFFFFFFFFFFFFFF;
            }
        }else if (bits_src1 < 0 && bits_src2 > 0 && bits_src1 - bits_src2 > 0){
            //下溢出
            //[61:60], [C1, MSB1] = 10
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB underflow exception");
                res = static_cast<uint64_t>(bits_src1 - bits_src2);
            } else {
                res = 0x8000000000000000;
            }
        }else{
            res = static_cast<uint64_t>(bits_src1 - bits_src2);
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUB_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    int64_t bits_src1 = imm_6_signed_inflation_64(imm);
    uint64_t src2 = read_Reg(src2_reg_id);
    int64_t bits_src2 = static_cast<int64_t>(src2);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((bits_src1 > 0 && bits_src2 < 0 && bits_src1 - bits_src2 < 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //上溢出
            //[61:60], [C1, MSB1] = 01
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB overflow exception");
                res = static_cast<uint64_t>(bits_src1 - bits_src2);
            } else {
                res = 0x7FFFFFFFFFFFFFFF;
            }
        }else if (bits_src1 < 0 && bits_src2 > 0 && bits_src1 - bits_src2 > 0){
            //下溢出
            //[61:60], [C1, MSB1] = 10
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB underflow exception");
                res = static_cast<uint64_t>(bits_src1 - bits_src2);
            } else {
                res = 0x8000000000000000;
            }
        }else{
            res = static_cast<uint64_t>(bits_src1 - bits_src2);
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBU_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t u_src1 = read_Reg(src1_reg_id);
    uint64_t u_src2 = read_Reg(src2_reg_id);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (u_src1 - u_src2 > u_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU overflow exception");
                res = u_src1 - u_src2;
            } else {
                res = 0x0000000000000000;
            }
        }else{
            res = u_src1 - u_src2;
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBU_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = imm;
    uint64_t bits_src2 = read_Reg(src2_reg_id);

    uint64_t res;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (bits_src1 - bits_src2 > bits_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU overflow exception");
                res = bits_src1 - bits_src2;
            } else {
                res = 0x0000000000000000;
            }
        }else{
            res = bits_src1 - bits_src2;
        }
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    //将对SST控制寄存器的修改写回
    write_Reg(183, sst, 1);

    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBC(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t src1 = read_Reg(src1_reg_id);
    uint64_t src2 = read_Reg(src2_reg_id);
    int64_t bits_src1 = static_cast<int64_t>(src1);
    int64_t bits_src2 = static_cast<int64_t>(src2);
    uint64_t res;
    if(bits_src2>=bits_src1){
        int64_t res_64 = ((bits_src2-bits_src1) << 1) + 1;
        res = static_cast<uint64_t>(res_64);
    }
    else{
        int64_t res_64 = bits_src2 << 1;
        res = static_cast<uint64_t>(res_64);
    }
    
    write_Reg(dst_reg_id, res, 1);
    return res;
}
    
inline uint64_t SIEU::do_SSUB32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t src1 = read_Reg(src1_reg_id);
    uint64_t src2 = read_Reg(src2_reg_id);

    int64_t bits_src1 = static_cast<int64_t>(src1);
    int64_t bits_src2 = static_cast<int64_t>(src2);

    int32_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int32_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int32_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int32_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res;
    int64_t res_low;
    int64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((low_src1 < 0 && low_src2 > 0 && low_src1 - low_src2 > 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UNDER_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 low underflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x80000000;
            }
        }else if (low_src1 > 0 && low_src2 < 0 && low_src1 - low_src2 < 0){
            sst |= MASK_SIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 low overflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else{
            res_low = static_cast<uint64_t>(low_src1 - low_src2);
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }

    try {
        if ((high_src1 < 0 && high_src2 > 0 && high_src1 - high_src2 > 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 high underflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {
                res_high = 0x80000000;
            }
        }else if (high_src1 > 0 && high_src2 < 0 && high_src1 - high_src2 < 0){
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 high overflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {            
                res_high = 0x7FFFFFFF;
            }
        }else{
            res_high = static_cast<uint64_t>(high_src1 - high_src2);
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    int64_t res_64 = (res_high << 32) | (res_low);
    res = static_cast<uint64_t>(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}
   
inline uint64_t SIEU::do_SSUB32_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t src2 = read_Reg(src2_reg_id);

    int64_t bits_src1 = static_cast<int64_t>(imm);
    int64_t bits_src2 = static_cast<int64_t>(src2);  

    int32_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int32_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int32_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int32_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res;
    int64_t res_low;
    int64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_SIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if ((low_src1 < 0 && low_src2 > 0 && low_src1 - low_src2 > 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UNDER_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 low underflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x80000000;
            }
        }else if (low_src1 > 0 && low_src2 < 0 && low_src1 - low_src2 < 0){
            sst |= MASK_SIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 low overflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x7FFFFFFF;
            }
        }else{
            res_low = static_cast<uint64_t>(low_src1 - low_src2);
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }

    try {
        if ((high_src1 < 0 && high_src2 > 0 && high_src1 - high_src2 > 0)){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            sst |= MASK_SIGN_UNDER_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 high underflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {
                res_high = 0x80000000;
            }
        }else if (high_src1 > 0 && high_src2 < 0 && high_src1 - high_src2 < 0){
            sst |= MASK_SIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUB32 high overflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {            
                res_high = 0x7FFFFFFF;
            }
        }else{
            res_high = static_cast<uint64_t>(high_src1 - high_src2);
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUB32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    int64_t res_64 = (res_high << 32) | (res_low);
    res = static_cast<uint64_t>(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBU32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = read_Reg(src1_reg_id);
    uint64_t bits_src2 = read_Reg(src2_reg_id);

    uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (low_src1 - low_src2 > low_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU32 low underflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x00000000;
            }
        }else{
            res_low = low_src1 - low_src2;
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    try {
        if (high_src1 - high_src2 > high_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU32 high underflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {
                res_high = 0x00000000;
            }
        }else{
            res_high = high_src1 - high_src2;
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    int64_t res_64 = (res_high << 32) | (res_low);
    res = static_cast<uint64_t>(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBU32_src1_imm(uint64_t imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = imm;
    uint64_t bits_src2 = read_Reg(src2_reg_id);

    uint32_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    uint32_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint32_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint32_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res;
    uint64_t res_low;
    uint64_t res_high;
    bool overflow = false;
    uint64_t sst = read_Reg(183);//VST的enum值是176
    uint64_t scr = read_Reg(186);//VCR的enum值是181
    //先将SIGN位置1，有符号操作，加法操作OP为0，因此先置位1000...0000
    sst |= MASK_UNSIGN_SUB;
    //SCR中AS标志位在第1位
    if((scr & (1 << 1)) == 0){
        overflow = true;
    }
    try {
        if (low_src1 - low_src2 > low_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW_LOW;
            sst |= MASK_SATa0;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU32 low underflow exception");
                res_low = static_cast<uint64_t>(low_src1 - low_src2);
            } else {
                res_low = 0x00000000;
            }
        }else{
            res_low = low_src1 - low_src2;
        }//低半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU32 Low 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    try {
        if (high_src1 - high_src2 > high_src1){//|| (bits_src1 < 0 && bits_src2 < 0 && bits_src1 + bits_src2 > 0)) {
            //溢出
            //[C1] = 1
            sst |= MASK_UNSIGN_UP_OVERFLOW;
            sst |= MASK_SATa1;
            if (!overflow) {
                //非饱和运算则抛出异常
                throw std::overflow_error("SSUBU32 high underflow exception");
                res_high = static_cast<uint64_t>(high_src1 - high_src2);
            } else {
                res_high = 0x00000000;
            }
        }else{
            res_high = high_src1 - high_src2;
        }//高半字饱和操作
    } catch (const std::overflow_error& e) {
        std::cerr << "Overflow error in SSUBU32 High 32 bits operation: " << e.what() << std::endl;
        //这里可以添加额外的错误处理逻辑，比如记录日志、设置错误标志等
    }
    write_Reg(183, sst, 1);
    int64_t res_64 = (res_high << 32) | (res_low);
    res = static_cast<uint64_t>(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSUBC32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1 = read_Reg(src1_reg_id);
    uint64_t bits_src2 = read_Reg(src2_reg_id);
    uint64_t res_low;
    uint64_t res_high;

    uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    if(low_src2 >= low_src1){
        res_low = ((low_src2 - low_src1) << 1) + 1;
    }
    else{
        res_low = low_src2 << 1;
    }

    if(high_src2 >= high_src1){
        res_high = ((high_src2 - high_src1) << 1) + 1;
    }
    else{
        res_high = high_src2 << 1;
    }
    
    uint64_t res = ((res_high << 32) | (res_low & 0xFFFFFFFF));
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline uint64_t SIEU::do_SSAT(int src1_reg_id, int src2_reg_id, int dst_reg_id){} //op = 111_0101_000; execution cycle = 1;未写
    
inline uint64_t SIEU::do_SSAT32(int src1_reg_id, int src2_reg_id, int dst_reg_id){} //op = 101_0101_000; execution cycle = 1；未写
   
inline double SIEU::do_SNEG(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));
    double res;
    double VST = read_Reg(176);//VST的enum值是176
    uint64_t vst;
    std::memcpy(&vst, &VST, sizeof(vst));
    if(bits_src2 == 0x8000000000000000){
        res = int64_to_double(bits_src2);
        uint64_t mask1 = ~ 1ULL;
        vst &= mask1;
    }
    else{res = int64_to_double(0 - bits_src2);}
    write_Reg(176, vst, 1);
    write_Reg(dst_reg_id,res,1);
    return res;
} 

inline double SIEU::do_SNEG32(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    int64_t res_low;
    int64_t res_high;
    double VST = read_Reg(176);//VST的enum值是176
    uint64_t vst;
    std::memcpy(&vst, &VST, sizeof(vst));
    if(low_src2 == 0x80000000){
        res_low = low_src2;
        uint64_t mask1 = ~ 1ULL;
        vst &= mask1;
    }
    else{res_low = 0 - low_src2;}
    
    if(high_src2 == 0x80000000){
        res_high = high_src2;
        uint64_t mask1 = ~ 2ULL;
        vst &= mask1;
    }
    else{res_high = int64_to_double(0 - high_src2);}
    write_Reg(176, vst, 1);
    int64_t res_64 = (res_high << 32) | (res_low);
    double res = int64_to_double(res_64);
    write_Reg(dst_reg_id,res,1);
    return res;
    }

    inline double SIEU::do_SABS(int src2_reg_id, int dst_reg_id){
        double src2 = read_Reg(src2_reg_id);
        double res;
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
        if (bits_src2 == std::numeric_limits<int64_t>::min()) {
            res = int64_to_double(bits_src2);  // 如果 Src = -2^63，直接赋值
        } else if (bits_src2 < 0) {
            res = int64_to_double(-bits_src2);  // 如果 Src < 0 且 Src ≠ -2^63，取反
        } else {
            res = int64_to_double(bits_src2);  // 如果 Src > 0，直接赋值
        }
        write_Reg(dst_reg_id,res,1);
        return res;
    } //op = 111_0100_000; execution cycle = 1

    inline double SIEU::do_SABS32(int src2_reg_id, int dst_reg_id){
        double src2 = read_Reg(src2_reg_id);
        int64_t res_low;
        int64_t res_high;
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    
        int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
        int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

        if (low_src2 == std::numeric_limits<int64_t>::min()) {
            res_low = low_src2;  // 如果 Src = -2^63，直接赋值
        } else if (bits_src2 < 0) {
            res_low = -low_src2;  // 如果 Src < 0 且 Src ≠ -2^63，取反
        } else {
            res_low = low_src2;  // 如果 Src > 0，直接赋值
        }

        if (high_src2 == std::numeric_limits<int64_t>::min()) {
            res_high = high_src2;  // 如果 Src = -2^63，直接赋值
        } else if (bits_src2 < 0) {
            res_high = -high_src2;  // 如果 Src < 0 且 Src ≠ -2^63，取反
        } else {
            res_high = high_src2;  // 如果 Src > 0，直接赋值
        }

        double res = int64_to_double((res_high << 32) | res_low);
        write_Reg(dst_reg_id, res, 1);
        return res;
    } //op = 101_0100_000; execution cycle = 1

    inline double SIEU::do_SMAX(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        double res;
        int64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
        if(bits_src1 > bits_src2){
            res = int64_to_double(bits_src1);
        } else{res = int64_to_double(bits_src1);}
        write_Reg(dst_reg_id, res, 1);
        return res;
    }//op = 111_0001_100; execution cycle = 1

    inline double SIEU::do_SMAXU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        double res;
        uint64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        uint64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
        if(bits_src1 > bits_src2){
            res = uint64_to_double(bits_src1);
        } else{res = uint64_to_double(bits_src1);}
        write_Reg(dst_reg_id, res, 1);
        return res;
    }//op = 110_0001_100; execution cycle = 1

    inline double SIEU::do_SMAX32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        int64_t res_64;

        int64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    
        int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
        int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
        int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
        int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    
        if(low_src1 > low_src2){
            if(high_src1 > high_src2){res_64 = (high_src1 << 32) | low_src1;}
            else{res_64 = (high_src1 << 32) | low_src2;}
        }else{
            if(high_src1 > high_src2){res_64 = (high_src2 << 32) | low_src1;}
            else{res_64 = (high_src2 << 32) | low_src2;}
        }
    
        double res = int64_to_double(res_64);

        write_Reg(dst_reg_id, res, 1);
        return res; 
    } //op = 101_0001_100; execution cycle = 1
    
    inline double SIEU::do_SMAXU32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        uint64_t res_64;

        uint64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        uint64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    
        uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
        uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
        uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
        uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    
        if(low_src1 > low_src2){
            if(high_src1 > high_src2){res_64 = (high_src1 << 32) | low_src1;}
            else{res_64 = (high_src1 << 32) | low_src2;}
        }else{
            if(high_src1 > high_src2){res_64 = (high_src2 << 32) | low_src1;}
            else{res_64 = (high_src2 << 32) | low_src2;}
        }
    
        double res = uint64_to_double(res_64);

        write_Reg(dst_reg_id, res, 1);
        return res; 
    }//op = 100_0001_100; execution cycle = 1

    inline double SIEU::do_SMIN(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        double res;
        int64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
        if(bits_src1 < bits_src2){
            res = int64_to_double(bits_src1);
        } else{res = int64_to_double(bits_src1);}
        write_Reg(dst_reg_id, res, 1);
        return res;
    } //op = 111_0001_000; execution cycle = 1

    inline double SIEU::do_SMINU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        double res;
        uint64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        uint64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
        if(bits_src1 < bits_src2){
            res = uint64_to_double(bits_src1);
        } else{res = uint64_to_double(bits_src1);}
        write_Reg(dst_reg_id, res, 1);
        return res;
    }//op = 110_0001_000; execution cycle = 1

    inline double SIEU::do_SMIN32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        int64_t res_64;

        int64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        int64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    
        int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
        int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
        int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
        int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    
        if(low_src1 > low_src2){
            if(high_src1 > high_src2){res_64 = (high_src1 << 32) | low_src1;}
            else{res_64 = (high_src1 << 32) | low_src2;}
        }else{
            if(high_src1 > high_src2){res_64 = (high_src2 << 32) | low_src1;}
            else{res_64 = (high_src2 << 32) | low_src2;}
        }
    
        double res = int64_to_double(res_64);

        write_Reg(dst_reg_id, res, 1);
        return res; 
    } //op = 101_0001_000; execution cycle = 1

    inline double SIEU::do_SMINU32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
        double src1 = read_Reg(src1_reg_id);
        double src2 = read_Reg(src2_reg_id);
        uint64_t res_64;

        uint64_t bits_src1;
        std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
        uint64_t bits_src2;
        std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    
        uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF; 
        uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
        uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
        uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    
        if(low_src1 < low_src2){
            if(high_src1 < high_src2){res_64 = (high_src1 << 32) | low_src1;}
            else{res_64 = (high_src1 << 32) | low_src2;}
        }else{
            if(high_src1 < high_src2){res_64 = (high_src2 << 32) | low_src1;}
            else{res_64 = (high_src2 << 32) | low_src2;}
        }
    
        double res = uint64_to_double(res_64);

        write_Reg(dst_reg_id, res, 1);
        return res; 
    } //op = 100_0001_000; execution cycle = 1

inline double SIEU::do_SEQ_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    double res; 
    if(src1 == src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0010_000; execution cycle = 1

inline double SIEU::do_SEQ_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    double src1 = static_cast<double>(imm);
    double src2 = read_Reg(src2_reg_id);
    double res; 
    if(src1 == src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_1010_000; execution cycle = 1

inline double SIEU::do_SLT_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    double res; 
    int64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    if(src1 < src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0010_010; execution cycle = 1
    
inline double SIEU::do_SLT_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    int64_t src1;
    std::memcpy(&src1, &imm, sizeof(src1));
    double src2_double = read_Reg(src2_reg_id);
    int64_t src2;
    std::memcpy(&src2, &src2_double, sizeof(src2));
    double res; 
    if(src1 < src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 111_1010_010; execution cycle = 1
    
inline double SIEU::do_SLTU_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    double res; 
    uint64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    if(src1 < src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
}//op = 110_0010_010; execution cycle = 1
    
inline double SIEU::do_SLTU_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t src1; 
    std::memcpy(&src1, &imm, sizeof(src1));
    double src2_double = read_Reg(src2_reg_id);
    uint64_t src2;
    std::memcpy(&src2, &src2_double, sizeof(src2));
    double res; 
    if(src1 < src2){
        res = 1;
    } else{res = 0;}
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 110_1010_010; execution cycle = 1
    
inline double SIEU::do_SEQ32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;

    int64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 == low_src2){
        if(high_src1 == high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = ( mask2 << 32) | mask1;}
        if(high_src1 == high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | 0;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
 } //op = 101_0010_000; execution cycle = 1
    
inline double SIEU::do_SEQ32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    int64_t res_64;
    int64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 == low_src2){
        if(high_src1 == high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = (mask2 << 32) | mask1;}
    }else{
        if(high_src1 == high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | mask2;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
 }  //op = 101_1010_000; execution cycle = 1
    
inline double SIEU::do_SLT32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;

    int64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 < low_src2){
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = (mask2 << 32) | mask1;}
    }else{
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | mask2;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
 }  //op = 101_0010_010; execution cycle = 1
    
inline double SIEU::do_SLT32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    int64_t res_64;
    int64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    int64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 < low_src2){
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = (mask2 << 32) | mask1;}
    }else{
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | mask2;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
 }

inline double SIEU::do_SMOV_SIEU(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    write_Reg(dst_reg_id, src2, 1);
    return src2;
} //op = 111_1110_001; execution cycle = 1
    
inline double SIEU::do_SMVCGC(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    int delay = 1;
    if(dst_reg_id == CVCCR){delay = 6;}
    else if(dst_reg_id <= SVR15 || dst_reg_id >= SVR0){delay = 3;}
    else if(dst_reg_id == VCR){delay = 3;}
    else if(dst_reg_id == VLR){delay = 5;}
    else if(dst_reg_id == IER){delay = 2;}
    else if(dst_reg_id == ICR){delay = 3;}
    else if(dst_reg_id == IRR){delay = 2;}
    else if(dst_reg_id == ISTP){delay = 2;}
    else if(dst_reg_id == EER){delay = 2;}
    else if(dst_reg_id == ECR){delay = 3;}
    else if(dst_reg_id == ERR){delay = 2;}
    else if(dst_reg_id == ESTP){delay = 2;}
    //to do：这里需要确定不同的delay；
    write_Reg(dst_reg_id, src2, delay);
    return src2;
}
//op = 111_1110_010; execution cycle = 1/2
   
inline double SIEU::do_SMVCCG(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    int delay = 1;
    //to do：这里需要确定不同的delay；
    
    if(dst_reg_id <= SVR15 || dst_reg_id >= SVR0){delay = 2;}
    else if(dst_reg_id == VCR){delay = 3;}
    else if(dst_reg_id == VLR){delay = 3;}
    else if(dst_reg_id == IER){delay = 2;}
    else if(dst_reg_id == ICR){delay = 2;}
    else if(dst_reg_id == IRR){delay = 2;}
    else if(dst_reg_id == ISTP){delay = 2;}
    else if(dst_reg_id == EER){delay = 2;}
    else if(dst_reg_id == ECR){delay = 2;}
    else if(dst_reg_id == ERR){delay = 2;}
    else if(dst_reg_id == ESTP){delay = 2;}

    write_Reg(dst_reg_id, src2, delay);
    return src2;
}

inline double SIEU::do_SMOVI_SIEU(long long int imm, int dst_reg_id){
    std::cout << "do SMOVI_SIEU called" << std::endl;
    std::cout << "imm:" << imm << std::endl;
    double Imm = static_cast<double>(imm);
    write_Reg(dst_reg_id, Imm,1);
    std::cout << "written Imm to reg " << dst_reg_id << ": " << Imm << std::endl;
    return Imm;
} //op 80位指令; execution cycle = 1

inline double SIEU::do_SMOVI24_SIEU(long long int imm1, int dst_reg_id){
    std::cout << "do SMOVI24_SIEU called" << std::endl;
    std::cout << "imm:" << imm1 << std::endl;
    int32_t imm = static_cast<int32_t>(imm1);
    std::cout << "imm as int32_t:" << std::hex << imm << std::endl;
    int64_t Imm = sign_extend_24_to_64(imm);
    std::cout << "sign-extended Imm:" << std::dec << Imm << std::endl;
    double  result = static_cast<double>(Imm); // 转换为int类型
    std::cout << "Imm as int:" << result << std::endl;
    //double Imm_double = int64_to_double(result); // 转换为double类型
    write_Reg(dst_reg_id, result,1);
    std::cout << "written Imm to reg " << dst_reg_id << ": " << result << std::endl;
    return result;
}

inline double SIEU::do_SAND_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    

    uint64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 & bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0011_000; execution cycle = 1
    
inline double SIEU::do_SAND_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 & bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_1011_000; execution cycle = 1
    
inline double SIEU::do_SOR_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
   

    uint64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 | bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0011_010; execution cycle = 1
    
inline double SIEU::do_SOR_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);

    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 | bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_1011_010; execution cycle = 1
   
inline double SIEU::do_SXOR_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);


    uint64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 ^ bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0011_100; execution cycle = 1
    
inline double SIEU::do_SXOR_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);

    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = bits_src1 ^ bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 111_1011_100; execution cycle = 1
    
inline double SIEU::do_SNOT_src1_r_SIEU(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    

    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t bits_res = ~ bits_src2;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0011_110; execution cycle = 1
    
inline double SIEU::do_SNOT_src1_imm(long long int imm, int dst_reg_id){
    uint64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1)); 

    uint64_t bits_res = ~ bits_src1;

    double res = uint64_to_double(bits_res);
    write_Reg(dst_reg_id, res, 1);
    return res;
}  

inline double SIEU::do_SLZD(int src2_reg_id, int dst_reg_id){
    double src = read_Reg(src2_reg_id);
    uint64_t Src = static_cast<uint64_t>(src);
    double res = 0;
    if (Src == 0) { res = 64;}  // 特殊情况：Src 为 0 时，前导 0 的个数为 64
    else{
        while ((Src & (1ULL << 63)) == 0) {  // 检查最高位是否为 0
            Src <<= 1;  // 左移 Src
            res++;
        }
    }
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 111_0101_100; execution cycle = 1
    
inline double SIEU::do_SLZD32(int src2_reg_id, int dst_reg_id){
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t res_low = 0;
    if (low_src2 == 0) { res_low = 64;}  // 特殊情况：Src 为 0 时，前导 0 的个数为 64
    else{
        while ((low_src2 & (1ULL << 63)) == 0) {  // 检查最高位是否为 0
            low_src2 <<= 1;  // 左移 Src
            res_low++;
        }
    }
    uint64_t res_high = 0;
    if (high_src2 == 0) { res_high = 64;}  // 特殊情况：Src 为 0 时，前导 0 的个数为 64
    else{
        while ((high_src2 & (1ULL << 63)) == 0) {  // 检查最高位是否为 0
            high_src2 <<= 1;  // 左移 Src
            res_high++;
        }
    }

    double res = uint64_to_double((res_high << 32) | res_low);
    write_Reg(dst_reg_id, res, 1);
    return res;
}

inline double SIEU::do_SSHFLL32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 << shift_num) | ((high_src2 << shift_num) << 32 );
    double res = uint64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0000_0000_00; execution cycle = 1
    
inline double SIEU::do_SSHFLL32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 << shift_num) | ((high_src2 << shift_num) << 32 );
    double res = uint64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} 

inline double SIEU::do_SSHFLL_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;

    double res = uint64_to_double(bits_src2 << shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0100_0000_00; execution cycle = 1
    

inline double SIEU::do_SSHFLL_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;
    double res = uint64_to_double(bits_src2 << shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
} 

inline double SIEU::do_SSHFLR32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 >> shift_num) | ((high_src2 >> shift_num) << 32 );
    double res = uint64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0000_1000_00; execution cycle = 1
    
inline double SIEU::do_SSHFLR32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 >> shift_num) | ((high_src2 >> shift_num) << 32 );
    double res = uint64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0010_1000_00; execution cycle = 1
    
inline double SIEU::do_SSHFLR_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;

    double res = uint64_to_double(bits_src2 >> shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0100_1000_00; execution cycle = 1
    
inline double SIEU::do_SSHFLR_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;
    double res = uint64_to_double(bits_src2 >> shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
} 
inline double SIEU::do_SSHFAR32_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 >> shift_num) | ((high_src2 >> shift_num) << 32 );
    double res = uint64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}//op = 0001_0000_00; execution cycle = 1

inline double SIEU::do_SSHFAR32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    int64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    int shift_num = Src1 % 32;

    res_64 = (low_src2 >> shift_num) | ((high_src2 >> shift_num) << 32 );
    double res = int64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0011_0000_00; execution cycle = 1

inline double SIEU::do_SSHFAR_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;

    double res = int64_to_double(bits_src2 >> shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0101_0000_00; execution cycle = 1
inline double SIEU::do_SSHFAR_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t Src1 = static_cast<uint64_t>(imm);
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    int shift_num = Src1 % 64;
    double res = int64_to_double(bits_src2 >> shift_num);
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 0111_0000_00; execution cycle = 1


inline double SIEU::do_SBCLR32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double res;
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint32_t low_src2 = static_cast<uint32_t>((bits_src2) & 0xFFFFFFFF);
    uint32_t high_src2 = static_cast<uint32_t>((bits_src2 >> 32) & 0xFFFFFFFF);

    if (Src1 > 31) {
        res = src2;  // 如果位置超出 31 位，保持原数据输出
    } else {
        // 清零指定位置
        res_64 = ((high_src2 & ~(1ULL << Src1)) << 32 ) | (low_src2 & ~(1ULL << Src1));  // 使用按位与和按位取反操作清零第 Src1 位
        res = uint64_to_double(res_64);
    }
     
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0000_0010_00; execution cycle = 1
    
inline double SIEU::do_SBCLR(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    uint64_t res_64 = bits_src2 & ~(1ULL << Src1);  // 使用按位与和按位取反操作清零第 Src1 位
    double res = int64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} 

inline double SIEU::do_SBSET32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double res;
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint32_t low_src2 = static_cast<uint32_t>((bits_src2 ) & 0xFFFFFFFF);
    uint32_t high_src2 = static_cast<uint32_t>((bits_src2 >> 32) & 0xFFFFFFFF);

    if (Src1 > 31) {
        res = src2;  // 如果位置超出 31 位，保持原数据输出
    } else {
        // 清零指定位置
        res_64 = ((high_src2 | (1ULL << Src1)) << 32 ) | (low_src2 | (1ULL << Src1));  // 使用按位与和按位取反操作清零第 Src1 位
        res = uint64_to_double(res_64);
    }
     
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0000_1010_00; execution cycle = 1
    
inline double SIEU::do_SBSET(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    uint64_t res_64 = bits_src2 | (1ULL << Src1);  // 使用按位与和按位取反操作清零第 Src1 位
    double res = int64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 0100_1010_00; execution cycle = 1

inline double SIEU::do_SBEX32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double res;
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint32_t low_src2 = static_cast<uint32_t>((bits_src2 ) & 0xFFFFFFFF);
    uint32_t high_src2 = static_cast<uint32_t>((bits_src2 >> 32) & 0xFFFFFFFF);

    if (Src1 > 31) {
        res = src2;  // 如果位置超出 31 位，保持原数据输出
    } else {
        // 清零指定位置
        res_64 = ((high_src2 ^ (1ULL << Src1)) << 32 ) | (low_src2 ^ (1ULL << Src1));  
        res = uint64_to_double(res_64);
    }
     
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 0001_0010_00; execution cycle = 1
    
inline double SIEU::do_SBEX(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  
    uint64_t res_64 = bits_src2 ^ (1ULL << Src1);  
    double res = int64_to_double(res_64);
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0101_0010_00; execution cycle = 1

inline double SIEU::do_SBTST32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double res;
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    if (Src1 > 31) {
        // 如果测试位超出 63，保持原数据输出
        res = src2;
    } else {
        // 生成测试掩码
        uint32_t mask = 1ULL << Src1;

        // 测试 Src2 的第 Src1 位
        if ((low_src2 & mask) == 0) {
            // 如果测试位为 0，设置 Dst 的对应位为 1
            low_src2 |= mask;
        } else {
            // 如果测试位为 1，保持 Dst 的对应位为 0
            low_src2 &= ~mask;
        }
        if ((high_src2 & mask) == 0) {
            // 如果测试位为 0，设置 Dst 的对应位为 1
            high_src2 |= mask;
        } else {
            // 如果测试位为 1，保持 Dst 的对应位为 0
            high_src2 &= ~mask;
        }
    }
    res = uint64_to_double((high_src2 << 32 ) | low_src2);
     
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 0001_1010_00; execution cycle = 1
    
inline double SIEU::do_SBTST(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    uint64_t Src1; 
    std::memcpy(&Src1, &src1, sizeof(Src1)); 
    double src2 = read_Reg(src2_reg_id);
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    double res;
    if (Src1 > 31) {
        // 如果测试位超出 63，保持原数据输出
        res = src2;
    } else {
        // 生成测试掩码
        uint32_t mask = 1ULL << Src1;

        // 测试 Src2 的第 Src1 位
        if ((bits_src2 & mask) == 0) {
            // 如果测试位为 0，设置 Dst 的对应位为 1
            bits_src2 |= mask;
        } else {
            // 如果测试位为 1，保持 Dst 的对应位为 0
            bits_src2 &= ~mask;
        }
        res = uint64_to_double(bits_src2);
    }
    write_Reg(dst_reg_id, res, 1);
    return res;
} 

inline double SIEU::do_SBEXT32(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double Src1  = read_Reg(src1_reg_id);
    double Src2  = read_Reg(src2_reg_id);
    int64_t src1;
    std::memcpy(&src1, &Src1,sizeof(src1));
    int64_t src2;
    std::memcpy(&src2, &Src2,sizeof(src2));
    // 提取 csta 和 cstb
    uint32_t csta = (src1 >> 6) & 0x3F;
    uint32_t cstb = src1 & 0x3F;

    double res;
    int64_t res_low = (src1) & 0xFFFFFFFF;
    int64_t res_high = (src1 >> 32 ) & 0xFFFFFFFF;
    // 检查 csta 和 cstb 是否有效
    if (csta >= 32 || cstb >= 32) {
        res = Src2;  // 结果保持原数据输出
        // 置位 oversize 位（假设 oversize 位是 dst 的最高位）
    } else {
        // 根据 csta 和 cstb 的关系截取数据
        if (cstb >= csta) {
            // 截取数据位段为 {31-csta, cstb-csta}
            int32_t mask = (1 << (cstb - csta + 1)) - 1;
            res_high = (src2 >> (31 - csta)) & mask;
            res_low = (src2 >> (31 - csta)) & mask;
            // 将截取位段右移 cstb-csta 位，高位补充 cstb 个符号位
            int64_t sign_bit_high = res_high >> (cstb - csta);
            int64_t sign_bit_low = res_low >> (cstb - csta);
            res_high = (res_high << (32 - (cstb - csta))) | (sign_bit_high << (32 - (cstb - csta) - 1));
            res_low = (res_low << (32 - (cstb - csta))) | (sign_bit_low << (32 - (cstb - csta) - 1));
        } else {
            // 截取数据位段为 {31-csta, 0}
            int64_t res_high = (src2 >> (31 - csta)) & 0xFFFFFFFF;
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
            int64_t sign_bit_high = res_high >> (31 - csta);
            res_high = (res_high << (csta - cstb)) | (sign_bit_high << (32 - (csta - cstb) - 1));
            int64_t res_low = (src2 >> (31 - csta)) & 0xFFFFFFFF;
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
            int64_t sign_bit_low = res_high >> (31 - csta);
            res_low = (res_low << (csta - cstb)) | (sign_bit_low << (32 - (csta - cstb) - 1));
        }
        // 将截取的数据扩展为 32 位有符号整数
        res = int64_to_double((res_high << 32) | res_low);
    }
    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 0010_0010_00; execution cycle = 1
    
inline double SIEU::do_SBEXT(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double Src1  = read_Reg(src1_reg_id);
    double Src2  = read_Reg(src2_reg_id);
    int64_t src1;
    std::memcpy(&src1, &Src1,sizeof(src1));
    int64_t src2;
    std::memcpy(&src2, &Src2,sizeof(src2));
    // 提取 csta 和 cstb
    uint32_t csta = (src1 >> 6) & 0x3F;
    uint32_t cstb = src1 & 0x3F;

    int64_t res;

    int64_t mask = (1ULL << (cstb - csta + 1)) - 1;
    res = (src2 >> (63 - csta)) & mask;

    if (cstb >= csta) {
            // 将截取位段右移 cstb-csta 位，高位补充 cstb 个符号位
        int64_t sign_bit = res & (1ULL << (cstb - csta));
        res = (sign_bit ? -1ULL : 0) << (63 - cstb) | (res >> (cstb - csta));
    } else {
            // 截取数据位段为 {63-csta, 0}
        int64_t res = (src2 >> (63 - csta));
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
        int64_t sign_bit = res & (1ULL << (csta - cstb));
        res = (sign_bit ? -1ULL : 0) << (63 - cstb) | (res << (csta - cstb));
    }
        // 将截取的数据扩展为 32 位有符号整数

    double res_ = int64_to_double(res);
    write_Reg(dst_reg_id, res_, 1);
    return res_;
}

inline double SIEU::do_SBEXT32U(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double Src1  = read_Reg(src1_reg_id);
    double Src2  = read_Reg(src2_reg_id);
    uint64_t src1;
    std::memcpy(&src1, &Src1,sizeof(src1));
    uint64_t src2;
    std::memcpy(&src2, &Src2,sizeof(src2));
    // 提取 csta 和 cstb
    uint32_t csta = (src1 >> 6) & 0x3F;
    uint32_t cstb = src1 & 0x3F;

    uint64_t res;
    uint64_t res_low = (src1) & 0xFFFFFFFF;
    uint64_t res_high = (src1 >> 32 ) & 0xFFFFFFFF;
    // 检查 csta 和 cstb 是否有效
    if (csta >= 32 || cstb >= 32) {
        res = src2;  // 结果保持原数据输出
        // 置位 oversize 位（假设 oversize 位是 dst 的最高位）
    } else {
        // 根据 csta 和 cstb 的关系截取数据
        if (cstb >= csta) {
            // 截取数据位段为 {31-csta, cstb-csta}
            uint32_t mask = (1 << (cstb - csta + 1)) - 1;
            res_high = (src2 >> (31 - csta)) & mask;
            res_low = (src2 >> (31 - csta)) & mask;
            // 将截取位段右移 cstb-csta 位，高位补充 cstb 个符号位
            uint64_t sign_bit_high = res_high >> (cstb - csta);
            uint64_t sign_bit_low = res_low >> (cstb - csta);
            res_high = (res_high << (32 - (cstb - csta))) | (sign_bit_high << (32 - (cstb - csta) - 1));
            res_low = (res_low << (32 - (cstb - csta))) | (sign_bit_low << (32 - (cstb - csta) - 1));
        } else {
            // 截取数据位段为 {31-csta, 0}
            uint64_t res_high = (src2 >> (31 - csta)) & 0xFFFFFFFF;
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
            uint64_t sign_bit_high = res_high >> (31 - csta);
            res_high = (res_high << (csta - cstb)) | (sign_bit_high << (32 - (csta - cstb) - 1));
            uint64_t res_low = (src2 >> (31 - csta)) & 0xFFFFFFFF;
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
            uint64_t sign_bit_low = res_high >> (31 - csta);
            res_low = (res_low << (csta - cstb)) | (sign_bit_low << (32 - (csta - cstb) - 1));
        }
        // 将截取的数据扩展为 32 位有符号整数
        res = (res_high << 32) | res_low;
    }
    write_Reg(dst_reg_id, res, 1);
    return res;
}  //op = 0010_1010_00; execution cycle = 1
   
inline double SIEU::do_SBEXTU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double Src1  = read_Reg(src1_reg_id);
    double Src2  = read_Reg(src2_reg_id);
    uint64_t src1;
    std::memcpy(&src1, &Src1,sizeof(src1));
    uint64_t src2;
    std::memcpy(&src2, &Src2,sizeof(src2));
    // 提取 csta 和 cstb
    uint32_t csta = (src1 >> 6) & 0x3F;
    uint32_t cstb = src1 & 0x3F;

    uint64_t res;
    
    int64_t mask = (1ULL << (cstb - csta + 1)) - 1;
    res = (src2 >> (63 - csta)) & mask;

    if (cstb >= csta) {
            // 将截取位段右移 cstb-csta 位，高位补充 cstb 个符号位
        uint64_t sign_bit = res & (1ULL << (cstb - csta));
        res = (sign_bit ? -1ULL : 0) << (63 - cstb) | (res >> (cstb - csta));
    } else {
            // 截取数据位段为 {63-csta, 0}
        uint64_t res = (src2 >> (63 - csta));
            // 将所截取的位段左移 csta-cstb 位，高位补充 cstb 个符号位
        uint64_t sign_bit = res & (1ULL << (csta - cstb));
        res = (sign_bit ? -1ULL : 0) << (63 - cstb) | (res << (csta - cstb));
        }
        // 将截取的数据扩展为 32 位有符号整数

    double res_ = uint64_to_double(res);
    write_Reg(dst_reg_id, res_, 1);
    return res_;
} 
inline double SIEU::do_SBALE2(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_low = bits_src1 & 0xFFFFFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_low = bits_src2 & 0xFFFFFFFF;

    double res = uint64_to_double((src2_low << 32 ) | src1_low);

    write_Reg(dst_reg_id,res,1);
    return res;
} //op = 0000_0100_00; execution cycle = 1
    
inline double SIEU::do_SBALE2H(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_high = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_high = (bits_src2 >> 32) & 0xFFFFFFFF;

    double res = uint64_to_double((src2_high << 32 ) | src1_high);

    write_Reg(dst_reg_id,res,1);
    return res;
} //op = 0000_1100_00; execution cycle = 1
  
inline double SIEU::do_SBALE2LH(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_low = bits_src1 & 0xFFFFFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_high = (bits_src2 >> 32) & 0xFFFFFFFF;

    double res = uint64_to_double((src2_high << 32 ) | src1_low);

    write_Reg(dst_reg_id,res,1);
    return res;
} //op = 0001_0100_00; execution cycle = 1
  
inline double SIEU::do_SBALE2HL(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_high = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_low = bits_src2 & 0xFFFFFFFF;

    double res = uint64_to_double((src2_low << 32 ) | src1_high);

    write_Reg(dst_reg_id,res,1);
    return res;
} //op = 0001_1100_00; execution cycle = 1
  
inline double SIEU::do_SBALE4H(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_low_high= (bits_src1 >> 16) & 0xFFFF;
    uint64_t src1_high_high= (bits_src1 >> 48) & 0xFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_low_high= (bits_src2 >> 16) & 0xFFFF;
    uint64_t src2_high_high= (bits_src2 >> 48) & 0xFFFF;

    double res = uint64_to_double((src2_high_high << 48 ) | (src2_low_high << 32) | (src1_high_high << 16) | src1_low_high);

    write_Reg(dst_reg_id,res,1);
    return res;
}//op = 0010_0100_00; execution cycle = 1
  
inline double SIEU::do_SBALE4L(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    uint64_t src1_low_low= bits_src1 & 0xFFFF;
    uint64_t src1_high_low= (bits_src1 >> 32) & 0xFFFF;
    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    uint64_t src2_low_low= bits_src2 & 0xFFFF;
    uint64_t src2_high_low= (bits_src2 >> 32) & 0xFFFF;

    double res = uint64_to_double((src2_high_low << 48 ) | (src2_low_low << 32) | (src1_high_low << 16) | src1_low_low);

    write_Reg(dst_reg_id,res,1);
    return res;
}

inline double SIEU::do_SSBALE2(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    int64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    int64_t src1_low = bits_src1 & 0xFFFFFFFF;
    int64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    int64_t src2_low = bits_src2 & 0xFFFFFFFF;
    if(bits_src1 > 0x7FFFFFFF){src1_low = 0x7FFFFFFF;}
    else if(bits_src1 < 0x80000000){src1_low = 0x80000000;}
    if(bits_src2 > 0x7FFFFFFF){src2_low = 0x7FFFFFFF;}
    else if(bits_src2 < 0x80000000){src2_low = 0x80000000;}
    double res = int64_to_double((src2_low << 32 ) | src1_low);

    write_Reg(dst_reg_id,res,1);
    return res;
}  //op = 0011_0100_00; execution cycle = 1
    
inline double SIEU::do_SSBALE4(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    
    uint64_t bits_src1;
    std::memcpy(&bits_src1,&src1,sizeof(bits_src1));
    int64_t src1_low = bits_src1 & 0xFFFFFFFF;
    int64_t src1_high = (bits_src1 >> 32) & 0xFFFFFFFF;
    int64_t src1_low_low= bits_src1 & 0xFFFF;
    int64_t src1_high_low= (bits_src1 >> 32) & 0xFFFF;
    if(src1_low > 0xFFFF){src1_low_low = 0xFFFF;}
    else if(src1_low < 0x0000){src1_low_low = 0x0000;}
    if(src1_high > 0xFFFF){src1_high_low = 0xFFFF;}
    else if(src1_high < 0x0000){src1_high_low = 0x0000;}

    uint64_t bits_src2;
    std::memcpy(&bits_src2,&src2,sizeof(bits_src2));
    int64_t src2_low = bits_src2 & 0xFFFFFFFF;
    int64_t src2_high = (bits_src2 >> 32) & 0xFFFFFFFF;
    int64_t src2_low_low= bits_src2  & 0xFFFF;
    int64_t src2_high_low= (bits_src2 >> 48) & 0xFFFF;
    if(src2_low > 0xFFFF){src2_low_low = 0xFFFF;}
    else if(src2_low < 0x0000){src2_low_low = 0x0000;}
    if(src2_high > 0xFFFF){src2_high_low = 0xFFFF;}
    else if(src2_high < 0x0000){src2_high_low = 0x0000;}

    double res = int64_to_double((src2_high_low << 48 ) | (src2_low_low << 32) | (src1_high_low << 16) | src1_low_low);

    write_Reg(dst_reg_id,res,1);
    return res;
} //op = 0011_1100_00; execution cycle = 1
    
inline double SIEU::do_SUBALE4H(int src2_reg_id, int dst_reg_id){
    double src = read_Reg(src2_reg_id);
    
    uint64_t bits_src;
    std::memcpy(&bits_src,&src,sizeof(bits_src));
    uint64_t src_low_high= (bits_src >> 16) & 0xFFFF;
    uint64_t src_high_high= (bits_src >> 48) & 0xFFFF;

    double res = uint64_to_double((src_high_high << 32) | src_low_high);

} //op = 0100_0100_00; execution cycle = 1
    
inline double SIEU::do_SUBALE4L(int src2_reg_id, int dst_reg_id){
    double src = read_Reg(src2_reg_id);
    
    uint64_t bits_src;
    std::memcpy(&bits_src,&src,sizeof(bits_src));
    uint64_t src_low_low= bits_src & 0xFFFF;
    uint64_t src_high_low= (bits_src >> 32) & 0xFFFF;

    double res = uint64_to_double((src_high_low << 32) | src_low_low);

} //op = 0100_1100_00; execution cycle = 1

inline double SIEU::do_SITL2(int src2_reg_id, int dst_reg_id){
    double src = read_Reg(src2_reg_id);
    
    uint64_t bits_src;
    std::memcpy(&bits_src,&src,sizeof(bits_src));
    uint64_t src_low= bits_src & 0xFFFFFFFF;
    uint64_t src_high= (bits_src >> 32) & 0xFFFFFFFF;

    double res = uint64_to_double((src_low << 32) | src_high);
} //op = 0101_0100_00; execution cycle = 1
    
inline double SIEU::do_SITL4(int src2_reg_id, int dst_reg_id){
    double src = read_Reg(src2_reg_id);
    
    uint64_t bits_src;
    std::memcpy(&bits_src,&src,sizeof(bits_src));
    uint64_t src_low_low= bits_src & 0xFFFF;
    uint64_t src_low_high= (bits_src >> 16) & 0xFFFF;
    uint64_t src_high_low= (bits_src >> 32) & 0xFFFF;
    uint64_t src_high_high= (bits_src >> 48) & 0xFFFF;

    double res = int64_to_double((src_high_low << 48 ) | (src_high_high << 32) | (src_low_low << 16) | src_low_high);

} //op = 0101_1100_00; execution cycle = 1
inline double SIEU::do_SLTU32_src1_r(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    uint64_t res_64;

    uint64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;

    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 < low_src2){
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = (mask2 << 32) | mask1;}
    }else{
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | mask2;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 100_0010_010; execution cycle = 1
inline double SIEU::do_SLTU32_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    uint64_t res_64;
    uint64_t bits_src1; 
    std::memcpy(&bits_src1, &imm, sizeof(bits_src1));
    double src2 = read_Reg(src2_reg_id);
    uint64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2));  

    uint64_t low_src1 = (bits_src1 ) & 0xFFFFFFFF;
    uint64_t high_src1 = (bits_src1 >> 32) & 0xFFFFFFFF;
    uint64_t low_src2 = (bits_src2 ) & 0xFFFFFFFF;
    uint64_t high_src2 = (bits_src2 >> 32) & 0xFFFFFFFF;
    uint64_t mask1 = 1ULL;
    uint64_t mask2 = 0ULL;
    if(low_src1 < low_src2){
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask1;}
        else{res_64 = (mask2 << 32) | mask1;}
    }else{
        if(high_src1 < high_src2){res_64 = (mask1 << 32) | mask2;}
        else{res_64 = (mask2 << 32) | mask2;}
    }

    double res = int64_to_double(res_64);

    write_Reg(dst_reg_id, res, 1);
    return res;
} //op = 100_1010_010; execution cycle = 1
inline double SIEU::do_SSUBA_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;

    int64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    // 截取src1的低36位，并按符号位扩展到37位
    int64_t extendedSrc1 = static_cast<int64_t>(bits_src1 & 0x3FFFFFFFFFF); // 截取低36位
    if (extendedSrc1 & (1ULL << 35)) { // 如果符号位为1，符号扩展到37位
        extendedSrc1 |= (1ULL << 36);
    }

    // src2高位补零扩展到37位
    int64_t extendedSrc2 = static_cast<int64_t>(bits_src2 & 0x3FFFFFFFFFF); // 截取低36位
    extendedSrc2 &= ~(1ULL << 36); // 确保第37位为0

    // 执行37位有符号加法操作
    int64_t result = extendedSrc1 - extendedSrc2;

    double res = int64_to_double(result & 0x3FFFFFFFFFF);
    if (is_Vec_Addr_Reg(src2_reg_id)) {
        write_Reg(dst_reg_id, res, 3);
    } else {
        write_Reg(dst_reg_id, res, 2);
    }
}

inline double SIEU::do_SSUBA_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    int64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    int64_t extendedSrc1 = static_cast<int64_t>(Src1 & 0x3FFFFFFFFFF); // 截取低36位
    if (extendedSrc1 & (1ULL << 35)) { // 如果符号位为1，符号扩展到37位
        extendedSrc1 |= (1ULL << 36);
    }

    // src2高位补零扩展到37位
    int64_t extendedSrc2 = static_cast<int64_t>(bits_src2 & 0x3FFFFFFFFFF); // 截取低36位
    extendedSrc2 &= ~(1ULL << 36); // 确保第37位为0

    // 执行37位有符号加法操作
    int64_t result = extendedSrc1 - extendedSrc2;

    double res = int64_to_double(result & 0x3FFFFFFFFFF);
    if (is_Vec_Addr_Reg(src2_reg_id)) {
        write_Reg(dst_reg_id, res, 3);
    } else {
        write_Reg(dst_reg_id, res, 2);
    }
}
    
inline double SIEU::do_SADDA_src1_r_SIEU(int src1_reg_id, int src2_reg_id, int dst_reg_id){
    double src1 = read_Reg(src1_reg_id);
    double src2 = read_Reg(src2_reg_id);
    int64_t res_64;

    int64_t bits_src1;
    std::memcpy(&bits_src1, &src1, sizeof(bits_src1));
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    // 截取src1的低36位，并按符号位扩展到37位
    int64_t extendedSrc1 = static_cast<int64_t>(bits_src1 & 0x3FFFFFFFFFF); // 截取低36位
    if (extendedSrc1 & (1ULL << 35)) { // 如果符号位为1，符号扩展到37位
        extendedSrc1 |= (1ULL << 36);
    }

    // src2高位补零扩展到37位
    int64_t extendedSrc2 = static_cast<int64_t>(bits_src2 & 0x3FFFFFFFFFF); // 截取低36位
    extendedSrc2 &= ~(1ULL << 36); // 确保第37位为0

    // 执行37位有符号加法操作
    int64_t result = extendedSrc1 + extendedSrc2;

    double res = int64_to_double(result & 0x3FFFFFFFFFF);
    if (is_Vec_Addr_Reg(src2_reg_id)) {
        write_Reg(dst_reg_id, res, 3);
    } else {
        write_Reg(dst_reg_id, res, 2);
    }
}
    
inline double SIEU::do_SADDA_src1_imm(long long int imm, int src2_reg_id, int dst_reg_id){
    int64_t Src1; 
    std::memcpy(&Src1, &imm, sizeof(Src1));
    double src2 = read_Reg(src2_reg_id);
    int64_t bits_src2;
    std::memcpy(&bits_src2, &src2, sizeof(bits_src2)); 
    int64_t extendedSrc1 = static_cast<int64_t>(Src1 & 0x3FFFFFFFFFF); // 截取低36位
    if (extendedSrc1 & (1ULL << 35)) { // 如果符号位为1，符号扩展到37位
        extendedSrc1 |= (1ULL << 36);
    }

    // src2高位补零扩展到37位
    int64_t extendedSrc2 = static_cast<int64_t>(bits_src2 & 0x3FFFFFFFFFF); // 截取低36位
    extendedSrc2 &= ~(1ULL << 36); // 确保第37位为0

    // 执行37位有符号加法操作
    int64_t result = extendedSrc1 - extendedSrc2;

    double res = int64_to_double(result & 0x3FFFFFFFFFF);
    if (is_Vec_Addr_Reg(src2_reg_id)) {
        write_Reg(dst_reg_id, res, 3);
    } else {
        write_Reg(dst_reg_id, res, 2);
    }
}

double SIEU::Execute(instruction* SIEU_instr){
    //do_SADDU_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(), )
    switch (SIEU_instr->get_opcode()){
    case SADD_src1_r_SIEU:
        return do_SADD_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADD_src1_imm:
        return do_SADD_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADDU_src1_r_SIEU:
        return do_SADDU_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADDU_src1_imm_SIEU:
        return do_SADDU_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SADD32_src1_r_SIEU:
        return do_SADD32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADD32_src1_imm:
        return do_SADD32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADDU32_src1_r_SIEU:
        return do_SADDU32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADDU32_src1_imm_SIEU:
        return do_SADDU32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUBA_src1_r_SIEU:
        return do_SSUBA_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                            static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SSUBA_src1_imm:
        return do_SSUBA_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                     static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SADDA_src1_r_SIEU:
        return do_SADDA_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SADDA_src1_imm:
        return do_SADDA_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUB_src1_r_SIEU:
        return do_SSUB_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUB_src1_imm:
        return do_SSUB_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUBU_src1_r_SIEU:
        return do_SSUBU_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUBU_src1_imm:
        return do_SSUBU_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUBC:
        return do_SSUBC(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SSUB32_src1_r_SIEU:
        return do_SSUB32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUB32_src1_imm:
        return do_SSUB32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SSUBU32_src1_r_SIEU:
        return do_SSUBU32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSUBU32_src1_imm:
        return do_SSUBU32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SSUBC32:
        return do_SSUBC32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSAT:
        return do_SSAT(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSAT32:
        return do_SSAT32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SNEG:
        return do_SNEG(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SNEG32:
        return do_SNEG32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SABS:
        return do_SABS(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SABS32:
        return do_SABS32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SMAX:
        return do_SMAX(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SMAX32:
        return do_SMAX32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SMAXU:
        return do_SMAXU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SMAXU32:
        return do_SMAXU32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());  
    case SMIN:
        return do_SMIN(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SMIN32:
        return do_SMIN32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SMINU:
        return do_SMINU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SMINU32:
        return do_SMINU32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());                                    
    case SEQ_src1_r:
        return do_SEQ_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SEQ_src1_imm:
        return do_SEQ_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLT_src1_r:
        return do_SLT_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLT_src1_imm:
        return do_SLT_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLTU_src1_r:
        return do_SLTU_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLTU_src1_imm:
        return do_SLTU_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SEQ32_src1_r:
        return do_SEQ32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SEQ32_src1_imm:
        return do_SEQ32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLT32_src1_r:
        return do_SLT32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLT32_src1_imm:
        return do_SLT32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLTU32_src1_r:
        return do_SLTU32_src1_r(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SLTU32_src1_imm:
        return do_SLTU32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
 
    case SMOV_SIEU:
        return do_SMOV_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SMVCGC:
        return do_SMVCGC(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SMVCCG:
        return do_SMVCCG(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SMOVI_SIEU:
        return do_SMOVI_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SMOVI24_SIEU:
        return do_SMOVI24_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SAND_src1_r:
        return do_SAND_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SAND_src1_imm:
        return do_SAND_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SOR_src1_r:
        return do_SOR_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SOR_src1_imm:
        return do_SOR_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SXOR_src1_r:
        return do_SXOR_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SXOR_src1_imm:
        return do_SXOR_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SNOT_src1_r:
        return do_SNOT_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SNOT_src1_imm:
        return do_SNOT_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SLZD:
        return do_SLZD(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SLZD32:
        return do_SLZD32(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SSHFLL_src1_r:
        return do_SSHFLL_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFLL_src1_imm:
        return do_SSHFLL_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SSHFLL32_src1_r:
        return do_SSHFLL32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFLL32_src1_imm:
        return do_SSHFLL32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFLR_src1_r:
        return do_SSHFLR_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFLR_src1_imm:
        return do_SSHFLR_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SSHFLR32_src1_r:
        return do_SSHFLR32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFLR32_src1_imm:
        return do_SSHFLR32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFAR_src1_r:
        return do_SSHFAR_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFAR_src1_imm:
        return do_SSHFAR_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());

    case SSHFAR32_src1_r:
        return do_SSHFAR32_src1_r_SIEU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSHFAR32_src1_imm:
        return do_SSHFAR32_src1_imm(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBCLR:
        return do_SBCLR(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBCLR32:
        return do_SBCLR32(static_cast<immediate_operand*>(SIEU_instr->get_operands(0))->get_imme_value(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBSET:
        return do_SBSET(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBSET32:
        return do_SBSET32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEX:
        return do_SBEX(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEX32:
        return do_SBEX32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBTST:
        return do_SBTST(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBTST32:
        return do_SBTST32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEXT:
        return do_SBEXT(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEXT32:
        return do_SBEXT32(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEXTU:
        return do_SBEXTU(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBEXT32U:
        return do_SBEXT32U(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE2:
        return do_SBALE2(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE2H:
        return do_SBALE2H(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE2LH:
        return do_SBALE2LH(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE2HL:
        return do_SBALE2HL(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE4H:
        return do_SBALE4H(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SBALE4L:
        return do_SBALE4L(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSBALE2:
        return do_SSBALE2(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SSBALE4:
        return do_SSBALE4(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id(),
                                        static_cast<register_operand*>(SIEU_instr->get_operands(2))->get_reg_id());
    case SUBALE4H:
        return do_SUBALE4H(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SUBALE4L:
        return do_SUBALE4L(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SITL2:
        return do_SITL2(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());
    case SITL4:
        return do_SITL4(static_cast<register_operand*>(SIEU_instr->get_operands(0))->get_reg_id(),
                                    static_cast<register_operand*>(SIEU_instr->get_operands(1))->get_reg_id());

    }
};